HISTORY

2004

    EDA

  • VBIC model version 1.2 was added to TE_SPICE3 for added flexibility in accommodating FABs supporting VBIC libraries.

  • Developed corner models for complimentary bipolar process.

    IC TESTING

  • Upgraded noise measurement system for bipolar transistor from DOS to LINUX. Also expanded the noise bandwidth from 1 MHz to 8 MHz. All device characterization has been upgraded from windows to LINUX and from "C" to the ICETs interface.

  • A green laser based automated laser trimming system was added to the EG4090 wafer prober for cutting metal links on wafers. The laser and the positioning X-Y table the laser is mounted on was interface to the LINUX test control ICET system. First shipment of production laser trim die was completed in April of 2004.

    NETWORK

  • Developed Secure Remote Access to Turgeon Engineering EDA tools and models. Wrote manuals for remote access and performed circuit simulation remotely on the Linux system.

    ICs COMPLETED

  • Working on a 6-bit quantizer. Proposals are being prepared for a D/A, mixer, log, anti-log, and PLL circuits.

2003

    EDA

  • Modeling capabilities are improved with the addition of parameter extraction for bipolar transistors.

  • Manuals for SPICE simulation and ESPro are published.

    IC TESTING

  • IC testing capabilities are further enhanced by adding an Electroglas 4090 wafer prober. Wafer probed 2 ICs. Enhance test software to control wafer prober as well as all other test equipment simultaneously.

    NETWORK

  • External access was upgraded to cable modem in anticipation of establishing remote access to the EDA tools.

    ICs COMPLETED

  • Three IC's moved into production, one in TI BiCOM-2 process, two in Legerity HV7 process, and one in a special bipolar process.

2002

    EDA

  • BSIM3v3.2.2 model added to TE_SPICE for superior simulation accuracy of MOS devices. Enhanced scheme for checking the sum of currents at each node in TE_SPICE. Enhancement to layout tools including plotting of non-manhattan geometries.

    IC TESTING

  • No significant developments.

    NETWORK

  • Upgraded our main Linux Server with a RAID 1 (Mirrored) Controller for to enhance fault-tolerance beyond that provided by a daily backup.

    ICs COMPLETED

  • Five IC's moved into production, one in IBM SiGe process, one in AMI 0.5Um CMOS process, two TI BiCOM-2 process, and one in Elmos 0.8um process.

2001

    EDA

  • Turgeon Engineering adds in house layout versus schematic (LVS) checking and design rule checking (DRC). Furthermore, in addition to parasitic metal capacitance, metal resistance extraction is implemented. The metal resistance extraction adds nodes at all the intersection of more than two metal paths, and provides an accurate representation of the parasitic electrical network that are often critical in high precision analog ICs.

    IC TESTING

  • IC testing capabilities are further enhanced by adding Keithly 2400 GPIB supplies and a Keithly 707 switch matrix controlled by a real time (RT) Linux system. The RT system is managed by a second time-sharing Linux system, freeing the RT system to be dedicated to managing the test hardware for optimum timing performance. The RT system also controls a 4-channels A/D board, 2 96 I/O digital boards, as well as the GPIB equipment. The entire system is powered through uninterruptible power units, to avoid testing disruptions and prevent data corruption.

    NETWORK

  • Two Linux systems were added (one with dual processors) to the computer network. The network backup was upgraded to a removable 40GB drive system with one copy of the backup off-site at all times. The Internet access was upgraded to StarBand satellite access.

    ICs COMPLETED

  • Three IC's moved into production, one in Agere's (Lucent Technologies) 33 volt CBIC-R process, one in Northrop Grumman's MEEKS BiCMOS process, and one in Elmos 0.8mm CMOS process.

2000

    EDA

  • Turgeon Engineering acquires in house IC layout capability, and successfully lays out a 27 sq mm BiCMOS ASIC. An option to obtain an init file (node initialization file) from the last time point of a transient analysis is added to Spice3, which virtually eliminates the dc convergence problem in Spice. The maximum length of an ESPro variable set is increased from 256,000 to 2,000,000, which simplifies parsing of Spice3 output for graphics. A new building block is developed for Spice output graphics that can handle 2,000,000 data points as an arbitrary number of traces constrained only by the product of the number of traces times the number of data points to be less than 2,000,000. ESPro graphs become embeddable in Microsoft word using the ESPro metafile feature.

    IC TESTING

  • General-purpose printed circuit board layout capabilities are added. In the test laboratory, control of most of the test equipment is shifted from Microsoft Windows based computers to Linux based computing systems. This alleviates program lock-up, data corruption and automation constraints.

  • Digital testing, driven directly from digital I/O PC card, is added that simplifies test development and shortens IC test time. Test development for a 68-pin mixed-signal IC is completed. The digital test table is obtained from a post-processed Spice3 nodal output file that is converted into using ESPro.

    NETWORK

  • Two Windows based computers, one Linux based computer and one SUN Ultra SPARC workstation is added to the network. The SUN workstation is licensed with Lucent legacy SCHEMA (schematic capture) and ADVICE circuit simulation programs.

    ICs COMPLETED

  • Six in Northrop Grumman's MEEKS BiCMOS process (four of these are intended for reliability studies and device characterization and modeling).

1999

    EDA

  • Upgraded Spice3 bipolar transistor models from 3 terminals only to 4 terminals in order to include the isolation parasitics in the simulation results.

    IC TESTING

  • DC characterization of transistor devices is automated with Windows base control system driving HP4142B dc source monitor unit through the GPIB bus.

    NETWORK

  • Upgraded the Turgeon Engineering in-house network to 100BaseT for both Windows and UNIX based systems.

    ICs COMPLETED

  • Turgeon Engineering released three ICs for production, two in the Lucent CBIC-V2 10 volt very high speed process for 5 volt and -5.6 volt linear regulation, and one in the Lucent ATP10 10 volt ultra high speed process for high speed comparing and programmable load.

1998

    EDA

  • Spice3 installed and made operational on Linux. High injection diode and bipolar transistor models added to Spice3. Initial device models library installed.

    IC TESTING

  • Device characterization automated with GPIB Windows temperature controlled oven (-55 to 125 C). Parameter extraction algorithm developed and device models created for both integrated processes and discrete devices.

    NETWORK

  • Added two Windows PCs two the network, and cross-platform file sharing (SAMBA).

    ICs COMPLETED

  • Turgeon Engineering releases three ICs for production, two Lucent CBIC-U2 12 volts high-speed for gain control and threshold detection, and a Lucent CBIC-V2 10 volt very high-speed comparator for automatic test equipment application.

1997

    EDA

  • No significant developments.

    IC TESTING

  • No significant developments.

    NETWORK

  • Implemented Network File System (NFS) sharing between the Linux Servers. Added a Winodws NT 4.0 Workstation system to the network.

    ICs COMPLETED

  • Turgeon Engineering delivered three ICs into production, one in the AT&T CBIC-R 33 volt process for controlling high power lasers in submarine cable applications, one in the AT&T 200 volt DI process for biasing a PIN diode, and one in the AT&T CBIC-U2 12 volt high speed process for driving dual FET in power supply switching applications.

1996

    EDA

  • No significant developments.

    IC TESTING

  • No significant developments.

    NETWORK

  • Networked Windows computers and SUN workstation with 10baseT network, and achieved dual boot UNIX Windows system. Introduced Linux as a complementary operating system with Windows. We networked the Linux Server with the existing Windows based Network via an X-Client called OMNI-X.

    ICs COMPLETED

  • Three ICs are completed, one in the AT&T CBIC-U2 12 volt high speed process for ADSL, one in the AT&T CBIC-S 90 volt process for a varactor controller, and one in the AT&T CBIC-V2 10 volt very high speed process for cable modem applications. Completed 6 data sheets for the CBIC-V2 macro cells designed in 1995. The data sheets were tutorial in nature and were posted on the Lucent website at one time.

1995

    EDA

  • Remote AT&T ADVICE circuit simulations are now being performed on a Windows base VT100 terminal with TEK4014 graphics terminal emulator (ATALK). IC data sheets are produced using Microsoft Word and Visio. Assist AT&T to improve modeling of quasi-saturation in its bipolar transistor model for the CBIC process.

    IC TESTING

  • IC testing is performed in the fabrication facility. Test requirements are provided on paper.

    NETWORK

  • Circuit simulation performed on AT&T ADVICE via modem access.

    ICs COMPLETED

  • Four ICs are completed, two in the AT&T CBIC-U2 12 volt high speed process for ADSL and two in the AT&T CBIC-R 33-volt process for submarine cable command control branching, and six macro cells (bandgap reference, current feedback OpAmp, comparator, rail to rail OpAmp, voltage feedback OpAmp, and four quadrant multiplier) in the AT&T CBIC-V2 10 volt very high speed process.

1994

    EDA

  • Custom IC design is verified through remote login on AT&T ADVICE circuit simulator. Schematic capture and IC layout are produced using AT&T in house software and IC layout designers.

    IC TESTING

  • Turgeon Engineering is established as a company, and obtains a contract from AT&T to perform noise characterization for the CBIC-V2 process. A Pentium 90 is acquired and equipped with a 1 MS/sec A/D board. A 90 dB gain amplifier is designed and built to amplify the noise and drive the A/D input. Four sets of 100,000 samples each are taken for each of 200 devices. The data is transferred to the SUN workstation, and the fast Fourier transform capability of ESPro is used to generate the 800 spectral densities. The spectral densities are average to obtain the noise spectral densities of the devices and extrapolate the effective base resistance for the NPN and PNP devices of the AT&T CBIC-V2 devices.

    NETWORK

  • SUN IPC workstation is networked to DOS PC for transferring PC test data to SUN for post processing utilizing an RS232 connection.

    ICs COMPLETED

  • A high-speed automatic test equipment (ATE) PIN driver IC is designed in the AT&T CBIC-U2 process.

Pre-1994

  • In 1988, ESPro is developed on an AT&T PC7300 running the AT&T system V UNIX system. ESPro is capable of parsing any ASCII file, process the accepted data and present the results in text or graphic form. Unique to ESPro is its ability to create custom graph paper, and interact with standard UNIX commands. It is ported to PC DOS in the same year and offered as a DOS product.

  • In 1989, ESPro is ported to SUN workstations, and offered as a SUN product. ESPro is extensively used to compute noise spectral densities in 1994. By 1999, ESPro will have become seamlessly integrated with the SPICE circuit simulator as a graphic post processor. It also finds much use in analyzing large volume of test data.

  • Beginning in 1991, remote access is established with AT&T via TEK 4014 terminal emulation and IC design contracts begin with AT&T. An 84 volt line feed controller is completed in 1992, and a D/A current controller is completed in 1993, as well as a dual OpAmp







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Site last updated Feb 6, 2013